From 8cb7f7d135455f7374c96406e3d148a282e8cb31 Mon Sep 17 00:00:00 2001 From: Jan Beulich Date: Fri, 2 May 2014 10:54:07 +0200 Subject: [PATCH] x86/EPT: flush cache when (potentially) limiting cachability While generally such guest side changes ought to be followed by guest initiated flushes, we're flushing the cache under similar conditions elsewhere (e.g. when the guest sets CR0.CD), so let's do so here too. Signed-off-by: Jan Beulich Reviewed-by: Tim Deegan --- xen/arch/x86/hvm/mtrr.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/xen/arch/x86/hvm/mtrr.c b/xen/arch/x86/hvm/mtrr.c index 0ec38fcc21..ee18553cda 100644 --- a/xen/arch/x86/hvm/mtrr.c +++ b/xen/arch/x86/hvm/mtrr.c @@ -650,8 +650,11 @@ int32_t hvm_set_mem_pinned_cacheattr( { rcu_read_unlock(&pinned_cacheattr_rcu_lock); list_del_rcu(&range->list); + type = range->type; call_rcu(&range->rcu, free_pinned_cacheattr_entry); p2m_memory_type_changed(d); + if ( type != PAT_TYPE_UNCACHABLE ) + flush_all(FLUSH_CACHE); return 0; } rcu_read_unlock(&pinned_cacheattr_rcu_lock); @@ -698,6 +701,8 @@ int32_t hvm_set_mem_pinned_cacheattr( list_add_rcu(&range->list, &d->arch.hvm_domain.pinned_cacheattr_ranges); p2m_memory_type_changed(d); + if ( type != PAT_TYPE_WRBACK ) + flush_all(FLUSH_CACHE); return 0; } @@ -787,7 +792,10 @@ HVM_REGISTER_SAVE_RESTORE(MTRR, hvm_save_mtrr_msr, hvm_load_mtrr_msr, void memory_type_changed(struct domain *d) { if ( iommu_enabled && d->vcpu && d->vcpu[0] ) + { p2m_memory_type_changed(d); + flush_all(FLUSH_CACHE); + } } int epte_get_entry_emt(struct domain *d, unsigned long gfn, mfn_t mfn, -- 2.30.2